2006-01-01
Convergence speed and throughput of analog iterative decoders for low-density parity-check (LDPC) codes
Publication
Publication
Presented at the
6th International ITG-Conference on Source and Channel Coding and 2006 4th International Symposium on Turbo Codes and Related Topics, TURBOCODING 2006 (April 2006), Munich
This paper is concerned with the implementation of iterative decoding algorithms in analog VLSI. We study the convergence speed and throughput of analog decoders for low-density parity-check (LDPC) codes, and show that they depend on the code, the decoding algorithm, and the average time constant of the analog circuit interconnections. They however are not a function of the variance of the time constants and change only slightly with signal to noise ratio. The analysis presented here can be used for selecting suitable codes and decoding algorithms for analog decoding. Furthermore, it can be used to estimate the throughput of an analog decoder, if the average time constant of the analog circuit is known.
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Conference | 6th International ITG-Conference on Source and Channel Coding and 2006 4th International Symposium on Turbo Codes and Related Topics, TURBOCODING 2006 |
Citation |
Hemati, S. (Saied), & Banihashemi, A. (2006). Convergence speed and throughput of analog iterative decoders for low-density parity-check (LDPC) codes. In Turbo Codes and Related Topics; 6th International ITG-Conference on Source and Channel Coding (TURBOCODING), 2006 4th International Symposium on.
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