As signal speeds increase, interconnect effects such as signal delay, distortion, and crosstalk become the dominant factor limiting over all performance of VLSI systems. This paper describes a CAD framework addressing three specific aspects of the high-speed interconnect problem; namely, simulation, sensitivity analysis, and performance optimization. Distributed interconnect models represented by uniform or nonuniform lossy coupled transmission lines are supported. The CAD framework incorporates parallel processing capability. It also provides a design environment for integrating accurate simulations or waveform estimation, sensitivity analysis, design specifications, and numerical optimization. New approaches enhancing the accuracy and ensuring the stability of moment-matching techniques used in the asymptotic waveform evaluation (AWE) are introduced. Also described are a parallel implementation of numerical inversion of Laplace transform (NILT) and parallel interconnect optimization, resulting in substantial CPU speedup over existing NILT simulation and optimization.

Additional Metadata
Persistent URL dx.doi.org/10.1109/81.199888
Journal IEEE Transactions on Circuits and Systems I: Regular Papers
Citation
Griffith, R. (Richard), Chiprout, E. (Eli), Zhang, Q.-J. (Qi-jun), & Nakhla, M.S. (1992). A CAD Framework for Simulation and Optimization of High-Speed VLSI Interconnections. IEEE Transactions on Circuits and Systems I: Regular Papers, 39(11), 893–906. doi:10.1109/81.199888