In this paper we present the analysis of heat flow in integrated devices using Atar a 3D heat flow simulator. A variety of heating issues in standard silicon (bulk) and silicon on insulator (SOI) technologies will be studied. In particular Atar will be used to predict the effect of backend heating effects in low K and traditional processes and will include the effects of device heating at the surface. The temperature dependence of the electrical resistivity of the metal interconnects will be included in a self-consistent (SC) analysis.

Additional Metadata
Conference Advanced Metallization Conference 2001 (AMC 2001)
Citation
Smy, T, Walkey, D., Shams, M, & Joshi, R.V. (2001). Simulations of local heating in VLSI backend structures using Atar. Presented at the Advanced Metallization Conference 2001 (AMC 2001).