A 1 V 3.8-5.7 GHz VCO was designed and fabricated in a 0.13 μm SOI CMOS process. This VCO features differentially-tuned accumulation MOS varactors that (a) provides 40% frequency tuning when biased between 0 to 1 V, and (b) rejects common-mode noise such as flicker noise. At 1 MHz offset, the phase noise is -121.67 dBc/Hz at 3.8 GHz, and -111.67 dBc/Hz at 5.7 GHz. The power dissipation is between 2.3 to 2.7 mW depending on the centre frequency. When VDD is reduced to 0.75 V, the VCO only dissipates 0.8 mW at 5.5 GHz.

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Conference 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Fong, N. (Neric), Plouchart, J.-O. (Jean-Olivier), Zamdmer, N. (Noah), Liu, D. (Duixian), Wagner, L. (Lawrence), Plett, C, & Tarr, G. (Garry). (2002). A 1V 3.8-5.7 GHz differentially-tuned VCO in SOI CMOS. Presented at the 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.