A dual edge-triggered phase-frequency detector architecture
A Phase-Frequency Detector (PFD) is widely used in a PLL-based frequency synthesizer. A PFD is an edge-triggered device and its operation is, therefore, not dependent on the duty cycle of its input signals. To improve performance, the phase comparison can be performed on both the edges. The potential problem of unequal duty cycles of the two input signals has to be solved in order to arrive at a functional dual edge-triggered PFD architecture. This paper proposes a dual-edge triggered PFD architecture that is independent of the duty cycle of the PFD inputs. The pull-in performance of a synthesizer using the new PFD is enhanced while the stability remains unchanged. This is due to the DC outputs of the new PFD during the pull-in phase only. The newly proposed Agile-PFD or APFD requires only digital cells and is independent of any given technology, PFD architectures or fabrication process.
|Conference||Proceedings of the 2003 IEEE International Symposium on Circuits and Systems|
Ahmed, S.I., & Mason, R. (2003). A dual edge-triggered phase-frequency detector architecture. Presented at the Proceedings of the 2003 IEEE International Symposium on Circuits and Systems.