Design and FPGA implementation of a multicarrier baseband processor
A full duplex multicarrier baseband processor has been designed and implemented on a Xilinx Vertex II Pro FPGA device. This modem has been configured to modulate and demodulate a group of up to 8 carriers with equal bandwidth channels supporting T1 data rates. Simulation results show that the 8-channel full duplex multicarrier circuit can support a data throughput of up to 71 Mbps. The circuit can be reconfigured to support channel data rates of up to 5T1. The 8-channel design was validated and its performance was verified against functional models developed in SystemView.
|Keywords||Multicarrier basedband processor, System-on-chip implementation|
|Conference||Proceedings of the IASTED International Conference on Circuits, Signals and Systems|
Ho, H., Szwarc, V., & Kwasniewski, T. (2003). Design and FPGA implementation of a multicarrier baseband processor. Presented at the Proceedings of the IASTED International Conference on Circuits, Signals and Systems.