In this paper we describe the construction method of a family of irregular rate-compatible low-density parity-check (LDPC) codes by a combination of puncturing and extending techniques. In particular, we introduce a suitable structure for the extended parity-check matrices which preserves the structure of LDPC codes during extensions. Based on this construction, a family of efficient rate-compatible linear-time encodable codes are generated from an optimized irregular mother code of rate 8/13 and information block length k=1024. The rates of the codes vary from 8/10 to 8/19 and employing them in a type-II hybrid ARQ scheme results in a throughput which is only 0.7 dB away from Shannon limit. This improves over the existing schemes based on turbo codes and LDPC codes by up to 0.5 dB.

, , , ,
Canadian Conference on Electrical and Computer Engineering; Technology Driving Innovation, 2004
Department of Systems and Computer Engineering

Yazdani, M. (Mohammadreza), & Banihashemi, A. (2004). Irregular rate-compatible LDPC codes for capacity-approaching hybrid-ARQ schemes. In Canadian Conference on Electrical and Computer Engineering (pp. 303–306).