A new high-resolution time-to-digital converter (TDC) architecture based on MOS-Current-Mode-Logic (MCML) is described. Aiming at high resolution and large dynamic range, the prototype is implemented with 0:13 μm CMOS technology. A time domain resolution of 10:6 ps and a respectively large dynamic range of 100 ns was achieved. A switched MCML active load for variable resolution and dynamic range capability is described.

61st IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2018
Department of Electronics

Zhao, T. (Tianshuo), & MacEachern, L. (2019). A High Resolution MCML-based Time-to-Digital Converter Implementation. In Midwest Symposium on Circuits and Systems (pp. 298–301). doi:10.1109/MWSCAS.2018.8624032