Design of asynchronous circuit primitives using mos current-mode logic (MCML)
This paper introduces and compares two topologies for the C-element in MCML and two topologies for double-edge-triggered flip-flop in MCML. Based on the simulation results, an asynchronous MCML C-element dissipates four times less power than conventional static CMOS C-element at the same throughout of 1.9 GHz. Also, MCML double-edge-triggered flip-flop runs up to three times faster than the conventional static CMOS counterpart at the same power level. All the circuits are implemented in a standard 0.18 μm CMOS technology.
|Conference||16th International Conference on Microelectronics, ICM 2004|
Kwan, T.W. (Tin Wai), & Shams, M. (2004). Design of asynchronous circuit primitives using mos current-mode logic (MCML). Presented at the 16th International Conference on Microelectronics, ICM 2004.