High-speed serial I/O trends, standards and techniques

The goal of this paper is to provide the reader with an overview of the major interconnect standards utilizing the high-speed serial I/O circuitry and to outline several design techniques required to successfully implement a typical multi-GHz serial I/O device. Several major design obstacles are presented followed by a discussion of potential design techniques that may be used to overcome such implementation issues. The paper will cover three main design approaches: low swing differential signaling, compensation based signaling and multilevel signaling.