Decision-feedback equalisation (DFE) is explored to reduce intersymbol interference and crosstalks in high-speed backplane applications. In the design of the clock and data recovery circuit, embedding DFE within a phase and frequency detector enhances the recovery of data inherently from distorted input signals and facilitates providing DFE with the recovered clock.
Electronics Letters
Department of Electronics

Li, M., Huang, W., Wang, S., & Kwasniewski, T. (2006). 0.18 μm CMOS backplane receiver with decision-feedback equalisation embedded. Electronics Letters, 42(13), 752–754. doi:10.1049/el:20061116