One of the two hypotheses which explain the cause of schizophrenia is the aberrant connectivity between neurons. For example, over 250,000 brain cells are generated every minute in a two months old fetus. These cells slither across the brain, seeking out their proper destination, and then send out billions of axons, similarly to new branches of massive trees in a forest. The axons make connections with other brain cells, and a single neuron may have 100,000 connections with other neurons. This connection building phase is followed by a pruning phase. Many of these synapses will die (e.g. only half of the 200 billions generated neurons will survive to adulthood). If the pruning of the synapses is not efficient, then the aberrant connectivity can lead to diseases like schizophrenia. The second hypothetical mechanism underlying schizophrenia can be the low level of local connections between neurons (excessive synoptic pruning). This two hypotheses are investigated experimentally in this paper. In order to do this investigation, we simulate the brain biological system by introducing a neural network model that embeds two subsystems (zones) within it. In this model, which tries to reproduce the piriform cortex, we perform changes to the number of connections (by increasing or decreasing them). By modifying the connectivity, we attempt to simulate the pruning process which may cause schizophrenia. The analyzed signals which describe these two zones are EEGs, We have investigated the level of chaos and the synchronization between these two zones. Both of these hypotheses have an impact on the level of chaos, but the excessive synaptic pruning hypothesis has a higher impact on the system dynamics regarding the nonlinear interdependence measure, than the insufficient pruning hypothesis.

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Canadian Conference on Electrical and Computer Engineering 2005
School of Computer Science

Calitoiu, D. (Dragos), Nussbaum, D, & Oommen, J. (2005). Investigating schizophrenia using local connectivity considerations within the piriform cortex. Presented at the Canadian Conference on Electrical and Computer Engineering 2005. doi:10.1109/CCECE.2005.1557304