A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications
This paper presents a fully integrated multi-band frequency synthesizer architecture. The synthesizer is a ΔΣ based fractional-N frequency synthesizer with three on-chip LC tuned VCOs to cover the entire frequency bands specified in IEEE802.11b, and 802.11a WLAN standards. The synthesizer includes a ΔΣ shaper, a dead-zone-free phase frequency detector and a fully differential charge pump. The measured in-band phase noise is lower than -93dBc/Hz and the VCO out of band phase noise is -120dBc/Hz at 1MHz offset.
|Conference||29th European Solid-State Circuits Conference, ESSCIRC 2003|
Rogers, J, Cavin, M. (Mark), Dai, F. (Foster), & Rahn, D. (Dave). (2003). A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications. Presented at the 29th European Solid-State Circuits Conference, ESSCIRC 2003. doi:10.1109/ESSCIRC.2003.1257219