RF circuit implications of a low-current linearity «sweet spot» in MOSFETs
The implications for RF circuit design of the nonlinear behaviour of a MOSFET transistor over all regions of operation, including moderate inversion region, is investigated. Analysis and measurements reveal a significant peaking, or «sweet-spot» of the third-order intercept point in the moderate inversion region. As a result, a significant increase in linearity at low power consumption is possible.
|28th European Solid-State Circuits Conference, ESSCIRC 2002|
|Organisation||Department of Electronics|
Toole, B. (Bill), Plett, C, & Cloutier, M. (Mark). (2002). RF circuit implications of a low-current linearity «sweet spot» in MOSFETs. Presented at the 28th European Solid-State Circuits Conference, ESSCIRC 2002.