Continuous compensation of binary-weighted DAC nonlinearities in bandpass delta-sigma modulators
We present a novel calibration technique to compensate for DAC element mismatches in bandpass multibit deltasigma (Δ∑) modulators. The proposed technique is purely digital and requires only a minor modification to the modulator loop. It is compatible with binary weighted element DACs and the storage requirements for the calibrated coefficients increases only linearly with the number of quantizer bits. The calibration is performed without breaking the loop, which allows continuous tracking of environmental drifts. Simulation results show a peak signal to noise and distortion ratio (SNDR) of 68 dB after calibration for a DAC with ±1% mismatches, a sinusoid input signal near 1/4 of the sampling frequency and an oversampling ratio of only 10. Those results represent a 26 dB improvement over the non-calibrated case while being within 2 dB of an ideal-DAC case.
|2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007|
|Organisation||Department of Electronics|
Gagnon, G. (Ghyslain), & MacEachern, L. (2007). Continuous compensation of binary-weighted DAC nonlinearities in bandpass delta-sigma modulators. Presented at the 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007.