2001-12-01
1.2 v 0.18 μm CMOS imager with column-level oversampling
Publication
Publication
Presented at the
27th European Solid-State Circuits Conference, ESSCIRC 2001 (September 2001)
A CMOS imager designed and fabricated in a 0.18 μm digital CMOS technology operating from a 1.2 V power supply is reported. The imager uses second-order oversampled delta-sigma modulator analog to digital conversion at the column level to achieve high dynamic range for this low supply voltage. In experimental tests the imager was shown capable of measuring input light levels ranging over 5 orders of magnitude.
| Additional Metadata | |
|---|---|
| Conference | 27th European Solid-State Circuits Conference, ESSCIRC 2001 |
| Citation |
Fortier, J., Tarr, N.G, Swaminathan, A., & Plett, C. (2001). 1.2 v 0.18 μm CMOS imager with column-level oversampling. Presented at the 27th European Solid-State Circuits Conference, ESSCIRC 2001.
|