2008-02-27
A 4GHz low complexity ADPLL-based frequency synthesizer in 90nm CMOS
Publication
Publication
Presented at the
2007 IEEE Custom Integrated Circuits Conference, CICC (September 2007)
| Additional Metadata | |
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| Persistent URL | dx.doi.org/10.1109/CICC.2007.4405790 |
| Conference | 2007 IEEE Custom Integrated Circuits Conference, CICC |
| Citation |
Jingcheng, Z. (Zhuang), Qingjin, D. (Du), & Kwasniewski, T. (2008). A 4GHz low complexity ADPLL-based frequency synthesizer in 90nm CMOS. Presented at the 2007 IEEE Custom Integrated Circuits Conference, CICC. doi:10.1109/CICC.2007.4405790
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