We show that stress engineering can be used to adjust the SOI waveguide birefringence to the stringent polarization tolerances expected of commercial devices, using only standard silicon processes. With decreasing device dimensions and high index contrast the waveguide birefringence becomes increasingly sensitive to device geometry. As a result, it is almost impossible to eliminate waveguide birefringence by adjusting waveguide profile alone. This paper presents, for the first time, a systematic study of the stress-induced birefringence in SOI waveguides. Through full-vectorial finite-element simulations, we investigate the variation of stress-induced birefringence with waveguide core and cladding geometries. It is found that the stress-induced birefringence is determined by the waveguide cross-section, the upper cladding layer thickness, and film stress levels. We develop a waveguide model that predicts the total waveguide birefringence and guides the post-fabrication processing steps. An experimental demonstration of polarization insensitivity in SOI arrayed waveguide grating (AWG) demultiplexers is presented. The polarization dependent wavelength shifts measured experimentally agree well with the simulations.

Additional Metadata
Keywords Arrayed waveguide gratings (AWG), Birefringence, Silicon-on-insulator (SOI), Stress, Waveguides
Persistent URL dx.doi.org/10.1117/12.529602
Conference Optoelectronic Integration on Silicon
Citation
Ye, W.N, Xu, D.-X. (Dan-Xia), Janz, S. (Siegfried), Cheben, P. (Pavel), Delâge, A. (André), Picard, M.-J. (Marie-Josée), … Tarr, N.G. (2004). Stress-induced birefringence in silicon-on-insulator (SOI) waveguides. Presented at the Optoelectronic Integration on Silicon. doi:10.1117/12.529602