This paper describes modification of conventional CML gates as used in frequency dividers by replacing the tail current source with a resistor. The custom gates are demonstrated as building components of frequency dividers implemented in a 0.13μm CMOS technology. The frequency of operation spans from 20MHz up to 11GHz from a 1V supply. The improvements of the phase noise of the frequency dividers and layout savings are reported.

Additional Metadata
Keywords CML, CMOS, Frequency divider, PLL, Resistor tail bias
Persistent URL dx.doi.org/10.1109/ISSSE.2007.4294521
Conference 2007 International Symposium on Signals, Systems and Electronics, URSI ISSSE 2007
Citation
Milicevic, S. (Sinisa), & MacEachern, L. (2007). Frequency dividers implementing custom cells with resistor tail bias. Presented at the 2007 International Symposium on Signals, Systems and Electronics, URSI ISSSE 2007. doi:10.1109/ISSSE.2007.4294521