An overview of high-speed serial I/O trends, techniques and standards

The goal of this paper is to provide the reader with a brief overview of the basic building blocks within a high-speed serial transceiver, to provide an outline of the major interconnect standards utilizing the high-speed serial I/O circuitry and to give the basics behind the design techniques required to successfully design and implement a typical multi-GHz serial I/O device. Several major design obstacles will be presented followed by a discussion of the potential design techniques that may be used to overcome such implementation issues. The paper will cover two main design approaches: low swing differential signaling and multilevel signaling.