A Q- and bandwidth-enhancing design technique for active inductors using parasitic cancellation
This paper presents the design technique and detailed equations of a high frequency, high-Q, active inductor (AI) that can be designed for frequencies above 6GHz using nonminimal- length CMOS technologies, e.g. 130nm CMOS, and used for industry because of the bias controls available in the topology. The design is acheived via a parasitic cancellation technique. An inductance of 2.89nH is acheived at 6.5GHz with a Q of 69. The designed active inductor is then used to obtain high-gain, narrowband tuning and an output matching element at or above 6.5GHz using this technology. Although this AI design is used single-endedly in this work, it can be used differentially as well since the design is fully bi-directional. The inductorless LNA parameters at 6.5GHz: S21 of 18dB, NFmin of 3.22dB, NF of 6dB and S22 less than -15dB with only 6.4mW (plus 2.5mW for narrow-band output match) power consumption for 1.2V supply.
|Conference||2008 2nd International Conference on Signals, Circuits and Systems, SCS 2008|
Ahmed, A. (Abdulhakim), & Wight, J. S. (2008). A Q- and bandwidth-enhancing design technique for active inductors using parasitic cancellation. In 2008 2nd International Conference on Signals, Circuits and Systems, SCS 2008. doi:10.1109/ICSCS.2008.4746960