Additional Metadata
Keywords Backplane, Duobinary, Edge equalizer, ISI, Jitter, NRZ
Persistent URL dx.doi.org/10.1109/ICICS.2009.5397646
Conference 7th International Conference on Information, Communications and Signal Processing, ICICS 2009
Citation
Chen, D. (Dianyong), Wang, B. (Bo), Liang, B. (Bangli), Cheng, D. (Dezhong), & Kwasniewski, T. (2009). Design and optimization of edge equalizer for high-speed electrical backplane. Presented at the 7th International Conference on Information, Communications and Signal Processing, ICICS 2009. doi:10.1109/ICICS.2009.5397646