A subharmonic injection-locking scheme for LO phase shifting phased-array architectures
A ninth subharmonic injection locking scheme is proposed for LO phase shifting based phased-array architectures operating in the ISM band at 24 GHz. The presented architecture employs a two stage phase shifter, a limiter and a Q-enhanced tuned amplifier to synthesize multiple phases of ninth-harmonic tones from a 2GHz reference at the destination and in close proximity to the RF/mm-w injection-locked oscillators operating at 18 GHz. A digital phase shift calibration technique is also discussed. The reported LO phase shifting and synthesis scheme is implemented in IBM's 120 nm CMOS technology and consumes a total of 11.8mW from a 1.2V supply. The oscillator core consumes a 3.7mW. The maximum phase shift error at 18 GHz is 4.29° and 0.42° before and after calibration, respectively.
|Asia Pacific Microwave Conference 2009, APMC 2009|
|Organisation||Department of Electronics|
Soliman, Y. (Yasser), & Mason, R. (2009). A subharmonic injection-locking scheme for LO phase shifting phased-array architectures. Presented at the Asia Pacific Microwave Conference 2009, APMC 2009. doi:10.1109/APMC.2009.5384273