This paper presents a novel technique to develop device models for semiconductor devices which include both nonlinear resistive and capacitive effects using artificial neural networks for use in SPICE-based circuit simulators. The inclusion of nonlinear capacitive effects in traditional neural network training of semiconductor devices is challenging due to the presence of time as an input variable in the training process. The proposed method effectively removes the necessity to include time in neural network training and eases the process of creating semiconductor device models using artificial neural networks. This technique has been tested with semiconductor diode circuits and accurate results were obtained. In addition, due to the nature of artificial neural networks, the device models developed using this method are particularly suitable for parallelization.

Additional Metadata
Persistent URL dx.doi.org/10.1109/SPI.2011.5898858
Conference 2011 IEEE 15th Workshop on Signal Propagation on Interconnects, SPI 2011
Citation
Gunupudi, P, Tang, P., Zhang, Q.J, & Smy, T. (2011). Modelling semiconductor junctions including nonlinear capacitive effects using neural networks. Presented at the 2011 IEEE 15th Workshop on Signal Propagation on Interconnects, SPI 2011. doi:10.1109/SPI.2011.5898858