To meet the growing demand for efficient circuit simulation tools, Obreshkov formula (ObF)-based high-order integration methods were recently proposed. However, one of the challenges in this method is the growing computational cost of the solution at a particular time point with the increasing orders of the ObF. To address this issue and target high-speed circuits with large linear blocks and nonlinear loads, a new parallel framework is proposed in this paper to minimize the CPU time associated with the solution at any time point. For this purpose, recently identified special properties of the resulting circuit matrices and the node-tearing principles are exploited, while developing an efficient parallel simulation framework. Numerical examples are presented to demonstrate the validity and efficiency of the proposed parallel method.

Additional Metadata
Keywords High-order L-stable methods, node-tearing partitioning, Obreshkov integration method, parallel time-domain simulation, time-domain simulation
Persistent URL dx.doi.org/10.1109/TCPMT.2014.2323118
Journal IEEE Transactions on Components, Packaging and Manufacturing Technology
Citation
Farhan, M.A. (Mina A.), Gad, E. (Emad), Nakhla, M.S, & Achar, R. (2014). Parallel simulation of large linear circuits with nonlinear terminations using high-order stable methods. IEEE Transactions on Components, Packaging and Manufacturing Technology, 4(7), 1201–1211. doi:10.1109/TCPMT.2014.2323118