This brief describes a built-in self-test (BIST) technique used to verify and tune the timing integrity of a clock distribution system implemented with injection-locked rotary traveling-wave oscillators (RTWOs). The die is fabricated in a 130-nm CMOS process and occupies 4.4 mm × 2.25 mm and is limited by the outer diameter of the RTWOs, leaving internal space for other circuits. The BIST circuits take a chip area of only 0.025 mm2. The measured frequency tuning range of the RTWOs is from 1.7 to 2.0 GHz. The measured RTWO phase tuning range is 58.56 ° with a worst case 0.34 ° phase tuning resolution. The injection-locked clock multiplication and distribution network achieves a single-sideband integrated RMS jitter of 66.8 fs from 10-kHz to 40-MHz offset frequencies at 2.04-GHz output. The BIST circuit allows testing of the integrity of the clock distribution system at speed by determining if the system clock skew can be tolerated or needs adjustment. To the authors' knowledge, the implementation of this BIST technique to determine clock integrity of an injection-locked clock distribution network has not been explored previously.

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Keywords Built-In Self-Test, Injection-locked oscillators, Phase noise, Rotary Traveling Wave Oscillators
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Journal IEEE Transactions on Circuits and Systems II: Express Briefs
Bai, Z. (Zhanjun), Zhou, X. (Xing), Mason, R, & Allan, G. (Gord). (2015). Low-phase noise clock distribution network using rotary traveling-wave oscillators and built-in self-test phase tuning technique. IEEE Transactions on Circuits and Systems II: Express Briefs, 62(1), 41–45. doi:10.1109/TCSII.2014.2362743